例句與造句

1. Efficient execution of multiple queries on deep memory hierarchy
   多存儲層次中多個查詢的高效執(zhí)行
2. Design and realization of memory hierarchy based on tms320c6711 processor
   6711處理器的存儲體系設計與實現(xiàn)
3. The value of a small microkernel for dreamy memory and the rampage memory hierarchy
   夢幻存儲器小微核的價值與rampage存儲層次
4. All systems have a memory hierarchy with memory at different speeds and sizes at different points in the hierarchy
   所有計算機系統(tǒng)都有一個由不同速度與大小的存儲器組成的層次結構。
5. 29 zhang y , chen z , zhou y . efficient execution of multiple queries on deep memory hierarchy full version
   本文下一步需要考慮的是， minitasking如何與現(xiàn)有的數(shù)據(jù)庫管理系統(tǒng)的查詢執(zhí)行引擎相結合。
6. It's difficult to find memory hierarchy in a sentence. 用memory hierarchy造句挺難的
7. The goal of a cache - oblivious algorithm is to be optimal in the use of the memory hierarchy , but without knowing any parameters of the hierarchy
   高速緩存參數(shù)無關算法的目標是，在不了解任何有關各層次參數(shù)的情況下，最優(yōu)地使用存儲系統(tǒng)。
8. This paper explores potential for the rampage memory hierarchy to use a microkernel with a small memory footprint , in a specialized cache - speed static ram tightly - coupled memory , tcm
   本文探討了專用的cache同速靜態(tài)ram緊耦合存儲器，簡稱tcm中rampage存儲層次使用一種帶有少量存儲痕跡的微核的可能性。
9. Accessing words in the lower , faster levels of this memory hierarchy can be done virtually immediately , but accessing the upper levels may cause delays of millions of processor cycles
   對該層次存儲體系中較低且速度較快的層次中字的訪問可立即得到響應，而對較高層次的訪問可能導致數(shù)百萬的處理器周期延遲。
10. 24 machanick p . correction to rampage asplos paper . computer architecture news , september 1999 , 27 : 2 - 5 . 25 machanick p , patel z . l1 cache and tlb enhancements to the rampage memory hierarchy
    仿真是基于適合移動設備的參數(shù)進行的，目的是盡可能把dram的能耗降低到自刷新模式能耗，而把把dram的性能提高到全功率模式的性能。
11. Architectural support for programming languages and operating systems asplos - viii , san jose , ca , october 1998 , pp . 105 - 114 . 2 machanick p . scalability of the rampage memory hierarchy . south african computer journal , august 2000 , : 68 - 73
    以往的工作說明，根據(jù)硬軟件折衷， rampage是一個潛在可行的方案同時也說明，隨著cpu - dram的速度差的增大， rampage也隨之適度變化。